I take it you do a lot of work in Verilog? I got a taste of Computer Architecture and Chip design in my Masters program this fall as a Computer Engineer, granted it was all VHDL and just FPGAs.

But learning all about the packaging methods, development, and life-cycle planning was a blast. It was a course that was a big eye opener for me as a Software Engineer, so thanks for all your hardwork on these low levels so guys like me can keep our abstractions :P

...and that's how you lose legitimacy in a single go! Literally another platform for the party, I expected more from a Marine.

Besides just playing like shit?

No I think it's the whole "playing like shit" thing that cost them entry.

Stop shilling your shitty subreddit here.

This IAMA is about these investigative reporters, why are you making this about yourself?